Linearized Phase Detector Zero Crossing DPLL Performance Evaluation in Faded Mobile Channels
نویسندگان
چکیده
Zero Crossing Digital Phase Locked Loop with Arc Sine block (AS-ZCDPLL) is used to linearize the phase difference detection, and enhance the loop performance. The loop has faster acquisition, less steady state phase error, and wider locking range compared to the conventional ZCDPLL. This work presents a Zero Crossing Digital Phase Locked Loop with Arc Sine block (ZCDPLL-AS). The performance of the loop is analyzed under mobile faded channel conditions. The mobile channel is assumed to be two path fading channel corrupted by additive white Gaussian noise (AWGM). It is shown that for a constant filter gain, the frequency spread has no effect on the steady state phase error variance when the loop is subjected to a phase step. For a frequency step and under the same conditions, the effect on phase error is minimal.
منابع مشابه
Simulation of Multipath Fading Channels with Non-isotropic Scattering
In this paper, using a suitable model for the distribution of the incoming waves at the mobile unit antenna (i.e. scattering distribution), two simulators for a typical mobile communication channel with non-isotropic scattering are proposed. In the proposed simulators, the directivity of the incoming waves can be changed quantitatively. These simulators have applications, for instance, in desig...
متن کاملDesign limitations and its effect in the performance of ZC1-DPLL
The paper studies the dynamics of a conventional positive going zero crossing type digital phase locked loop (ZC1-DPLL) taking non-ideal responses of the loop constituent blocks into account. The finite width of the sampling pulses and the finite propagation delay of the loop subsystems are properly modeled mathematically and the system dynamics is found to change because of their inf luence co...
متن کاملExtended Kalman Filtering and Phase Detector Modeling for a Digital Phase-Locked Loop
The realization of a digital phase-locked loop (DPLL) requires to choose a suitable phase detector and to design an appropriate loop filter; these tasks are commonly nontrivial in most applications. In this paper, the phase detector is examined, and a simple model is given to describe the characteristics of the timing function. The DPLL system is then formulated as a state estimation problem; t...
متن کاملA High-performance Cpfsk Phase-reconstruction Receiver with Viterbi Decoding
A number of modern wireless systems use modulation schemes like CPFSK, GMSK and DPSK, where the information to be transmitted is exclusively coded in the phase change of the RF-signal. Thus the detection of the received data can be performed by using only the zero crossings of the hard-limited IF-signal. With respect to implementation costs and power consumption this is a very attractive receiv...
متن کاملLow-complexity Sdr Implementation of Ieee 802.15.4 (zigbee) Baseband Transceiver on Application Specific Processor
This paper describes a low-cost SDR implementation and performance evaluation of an IEEE 802.15.4 (ZigBee) baseband transceiver realized with a programmable Transport Trigger Architecture (TTA) Application Specific Processor (ASP). The SDR implementation has advantages over current System-on-Chip (SOC) implementations in terms of programmability and flexibility. The transceiver is designed for ...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید
ثبت ناماگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید
ورودعنوان ژورنال:
- Circuits and Systems
دوره 2 شماره
صفحات -
تاریخ انتشار 2011